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Problems fixed in IO Checker 5.3 Revision 1
August 26, 2026

SPRTitleReleasedDescription
2394 CSV export failure 5.3.1 Unable to export pin view to CSV file without a pin file present
2393 Constraint file import does not report non-existing pins 5.3.1 Pins not present on the FPGA should be reported.
2391 Context menu in the device view deselects pin 5.3.1 A right mouse press in the device view de-selects all pins in the view except the one under the mouse cursor.
2369 Signal view import 5.3.1 Report result summary after Import signal view data from FPGA/PCB data.
2381 Symbol tool incorrect label size 5.3.1 Setting the IO Checker application font type and size also influences the graphical labels of symbols in the Symbol tool preview.
2189 Pin view improvement 5.3.1 Show pin differences for alternate device in the pin view.
An extra column is added showing the function icon of the alternate device pin.
FPGA Device updates 5.3.1
  • Altera
    Agilex 3, Agilex 5, Agilex 7
  • AMD
    Spartan Ultrascale+, Versal Gen2
  • Efinix
    Titanium
    Improved Efinix pin file reader to recognize 3 digits voltages (0.95 V)
  • Lattice Semiconductor
    Avant, Certus-N2
  • Microchip
    PolarFire, PolarFireSoc
    The constraint file parser and generator now support DriveStrength and SlewRate properties.
    Changed bank names in Igloo2, SmartFusion2 and RTG4 devices from B<no> to Bank<no>
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